TY  - BOOK
AU  - VYEMURA J 
TI  - CHIP DESIGN FOR SUBMICRON VLSI CMOS LOYOUT AND SIMULATION 
SN  - 9788131501955
U1  - 621.315/VYE 
PY  - 2018///
CY  - NEW DELHI 
PB  - CENGAGE
KW  - NULL
ER  -