<?xml version="1.0" encoding="utf-8" ?> <rss version="2.0" xmlns:opensearch="http://a9.com/-/spec/opensearch/1.1/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:atom="http://www.w3.org/2005/Atom"> <channel> <title> <![CDATA[ Search for 'au:&quot;Palnitkar, Samir.&quot;']]> </title> <!-- prettier-ignore-start --> <link> https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-search.pl?q=ccl=au%3A%22Palnitkar%2C%20Samir.%22&#38;sort_by=relevance&#38;format=rss </link> <!-- prettier-ignore-end --> <atom:link rel="self" type="application/rss+xml" href="https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-search.pl?q=ccl=au%3A%22Palnitkar%2C%20Samir.%22&#38;sort_by=relevance&#38;format=rss" /> <description> <![CDATA[ Search results for 'au:&quot;Palnitkar, Samir.&quot;' at ]]> </description> <opensearch:totalResults>11</opensearch:totalResults> <opensearch:startIndex>0</opensearch:startIndex> <opensearch:itemsPerPage>50</opensearch:itemsPerPage> <atom:link rel="search" type="application/opensearchdescription+xml" href="https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-search.pl?q=ccl=au%3A%22Palnitkar%2C%20Samir.%22&#38;sort_by=relevance&#38;format=opensearchdescription" /> <opensearch:Query role="request" searchTerms="q%3Dccl%3Dau%253A%2522Palnitkar%252C%2520Samir.%2522" startPage="" /> <item> <title> VERILOG HDL A GUIDE TO DIGITAL DESIGN AND SYNTHESIS 2ND ED/ </title> <dc:identifier>ISBN:</dc:identifier> <!-- prettier-ignore-start --> <link>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=52075</link> <!-- prettier-ignore-end --> <description> <![CDATA[ <p> By PALNITKAR SAMIR..<br /> PEARSON EDUCATION, DELHI .<br /> 492 , 9306 24 X 18.<br /> </p> ]]> <![CDATA[ <p> <a href="https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-reserve.pl?biblionumber=52075">Place hold on <em>VERILOG HDL A GUIDE TO DIGITAL DESIGN AND SYNTHESIS 2ND ED/</em></a> </p> ]]> </description> <guid>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=52075</guid> </item> <item> <title> VERILOG HDL A GUIDE TO DIGITAL DESIGN AND SYNTHESIS 2ND ED/ </title> <dc:identifier>ISBN:</dc:identifier> <!-- prettier-ignore-start --> <link>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=52076</link> <!-- prettier-ignore-end --> <description> <![CDATA[ <p> By PALNITKAR SAMIR..<br /> PEARSON EDUCATION, DELHI .<br /> 492 , 9307 24 X 18.<br /> </p> ]]> <![CDATA[ <p> <a href="https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-reserve.pl?biblionumber=52076">Place hold on <em>VERILOG HDL A GUIDE TO DIGITAL DESIGN AND SYNTHESIS 2ND ED/</em></a> </p> ]]> </description> <guid>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=52076</guid> </item> <item> <title> Verilog HDL A Guide to Digital Design and Synthesis 2nd ed IEEE 1364-2001 </title> <dc:identifier>ISBN:9788177589184</dc:identifier> <!-- prettier-ignore-start --> <link>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=60674</link> <!-- prettier-ignore-end --> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8177589180.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Palnitkar Samir,.<br /> Noida Pearson India Education Services Pvt. Ltd., 2018 .<br /> 490: 23*16.+.<br /> 9788177589184 </p> ]]> <![CDATA[ <p> <a href="https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-reserve.pl?biblionumber=60674">Place hold on <em>Verilog HDL A Guide to Digital Design and Synthesis 2nd ed IEEE 1364-2001</em></a> </p> ]]> </description> <guid>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=60674</guid> </item> <item> <title> Verilog HDL A Guide to Digital Design and Synthesis / </title> <dc:identifier>ISBN:</dc:identifier> <!-- prettier-ignore-start --> <link>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=120666</link> <!-- prettier-ignore-end --> <description> <![CDATA[ <p> By Palnitkar, Samir..<br /> Delhi : Pearson Education Inc. , 2001 .<br /> 495 ; 24*18..<br /> </p> ]]> <![CDATA[ <p> <a href="https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-reserve.pl?biblionumber=120666">Place hold on <em>Verilog HDL A Guide to Digital Design and Synthesis / </em></a> </p> ]]> </description> <guid>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=120666</guid> </item> <item> <title> Verilog HDL : A Guide to Digital Design </title> <dc:identifier>ISBN:</dc:identifier> <!-- prettier-ignore-start --> <link>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=180632</link> <!-- prettier-ignore-end --> <description> <![CDATA[ <p> By PALNITKAR (Samir).<br /> New Delhi PEARSON </p> ]]> <![CDATA[ <p> <a href="https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-reserve.pl?biblionumber=180632">Place hold on <em>Verilog HDL : A Guide to Digital Design</em></a> </p> ]]> </description> <guid>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=180632</guid> </item> <item> <title> Verilog HDL : A Guide to Digital Design </title> <dc:identifier>ISBN:</dc:identifier> <!-- prettier-ignore-start --> <link>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=180633</link> <!-- prettier-ignore-end --> <description> <![CDATA[ <p> By PALNITKAR (Samir).<br /> New Delhi PEARSON </p> ]]> <![CDATA[ <p> <a href="https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-reserve.pl?biblionumber=180633">Place hold on <em>Verilog HDL : A Guide to Digital Design</em></a> </p> ]]> </description> <guid>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=180633</guid> </item> <item> <title> Verilog HDL : A Guide to Digital Design </title> <dc:identifier>ISBN:</dc:identifier> <!-- prettier-ignore-start --> <link>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=180634</link> <!-- prettier-ignore-end --> <description> <![CDATA[ <p> By PALNITKAR (Samir).<br /> New Delhi PEARSON </p> ]]> <![CDATA[ <p> <a href="https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-reserve.pl?biblionumber=180634">Place hold on <em>Verilog HDL : A Guide to Digital Design</em></a> </p> ]]> </description> <guid>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=180634</guid> </item> <item> <title> Verilog HDL : A Guide to Digital Design </title> <dc:identifier>ISBN:</dc:identifier> <!-- prettier-ignore-start --> <link>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=180635</link> <!-- prettier-ignore-end --> <description> <![CDATA[ <p> By PALNITKAR (Samir).<br /> New Delhi PEARSON </p> ]]> <![CDATA[ <p> <a href="https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-reserve.pl?biblionumber=180635">Place hold on <em>Verilog HDL : A Guide to Digital Design</em></a> </p> ]]> </description> <guid>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=180635</guid> </item> <item> <title> Verilog HDL : A Guide to Digital Design </title> <dc:identifier>ISBN:</dc:identifier> <!-- prettier-ignore-start --> <link>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=180636</link> <!-- prettier-ignore-end --> <description> <![CDATA[ <p> By PALNITKAR (Samir).<br /> New Delhi PEARSON </p> ]]> <![CDATA[ <p> <a href="https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-reserve.pl?biblionumber=180636">Place hold on <em>Verilog HDL : A Guide to Digital Design</em></a> </p> ]]> </description> <guid>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=180636</guid> </item> <item> <title> Verilog HDL : A Guide to Digital Design </title> <dc:identifier>ISBN:</dc:identifier> <!-- prettier-ignore-start --> <link>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=181158</link> <!-- prettier-ignore-end --> <description> <![CDATA[ <p> By PALNITKAR (Samir).<br /> New Delhi PEARSON </p> ]]> <![CDATA[ <p> <a href="https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-reserve.pl?biblionumber=181158">Place hold on <em>Verilog HDL : A Guide to Digital Design</em></a> </p> ]]> </description> <guid>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=181158</guid> </item> <item> <title> Verilog HDL : A Guide to Digital Design </title> <dc:identifier>ISBN:</dc:identifier> <!-- prettier-ignore-start --> <link>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=181159</link> <!-- prettier-ignore-end --> <description> <![CDATA[ <p> By PALNITKAR (Samir).<br /> New Delhi PEARSON </p> ]]> <![CDATA[ <p> <a href="https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-reserve.pl?biblionumber=181159">Place hold on <em>Verilog HDL : A Guide to Digital Design</em></a> </p> ]]> </description> <guid>https://library.bharatividyapeeth.edu//cgi-bin/koha/opac-detail.pl?biblionumber=181159</guid> </item> </channel> </rss>
