Digital Logic Design using Verilog, State Machines and Synthesis for FPGAs (Record no. 182445)

MARC details
000 -LEADER
fixed length control field 00340nam a2200121Ia 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 230303s9999 xx 000 0 und d
041 ## - LANGUAGE CODE
Language code of text/sound track or separate title eng
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.392 LEE
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name LEE (Sunggn)
245 ## - TITLE STATEMENT
Title Digital Logic Design using Verilog, State Machines and Synthesis for FPGAs
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Place of publication, distribution, etc. NEW YORK
Name of publisher, distributor, etc. Australia Cenage
365 ## - TRADE PRICE
Currency code RS
Holdings
Withdrawn status Lost status Damaged status Not for loan Home library Current library Shelving location Date acquired Cost, normal purchase price Total Checkouts Full call number Barcode Date last seen Price effective from Koha item type
        College of Engineering, New Delhi College of Engineering, New Delhi   03/03/2023 299.00   621.392 LEE EB8969 03/03/2023 03/03/2023 Book