VERILOG HDL A GUIDE TO DIGITAL DESIGN AND SYNTHESIS (Record no. 638019)

MARC details
000 -LEADER
fixed length control field 00381pam a2200157a 44500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 230515b2008 xxu||||| |||| 00| 0 eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number NULL
041 ## - LANGUAGE CODE
Language code of text/sound track or separate title ENGLISH
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 006.3 SAM
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name PALNITKAR SA. MIR.
245 ## - TITLE STATEMENT
Title VERILOG HDL A GUIDE TO DIGITAL DESIGN AND SYNTHESIS
250 ## - EDITION STATEMENT
Edition statement 1
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Place of publication, distribution, etc.
Name of publisher, distributor, etc. PRENTICE HALL
Date of publication, distribution, etc. 2008
300 ## - PHYSICAL DESCRIPTION
Extent 490
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element NULL
Holdings
Withdrawn status Lost status Damaged status Not for loan Home library Current library Shelving location Date acquired Source of acquisition Cost, normal purchase price Total Checkouts Full call number Barcode Date last seen Price effective from Koha item type
        College of Engineering, Pune College of Engineering, Pune   28/06/2010 BHARATI MADHAWARTI SAHAKARI GRAHAK BHANDAR LTD 399.00   006.3 SAM ECP-G-24222 28/06/2023 28/06/2023 Book