00432pam a2200145 a 4500 9788126520374 621.39732 BAK Baker J. R., author., CMOS Circuit Design, Layout and Simulation Ieee press series Textual Documents New Delhi Wiley India Pvt. Ltd., 2013 xxxiii/1038: paper back; 23*15. Dig.Logic design 15153 58374 58374 0 0 0 0 EWP EWP EWP A-PG_6 2013-12-10 Bharati Madhyavarti Sahakari Grahak Bhandar Ltd., 629.00 0 621.39732 BAK EWP-PG52 2023-02-24 00:00:00 3 2023-02-24 BK 0 0 0 0 EWP EWP EWP A-PG_6 2013-12-10 Bharati Madhyavarti Sahakari Grahak Bhandar Ltd., 629.00 0 621.39732 BAK EWP-PG51 2023-02-24 00:00:00 2 2023-02-24 BK 0 0 0 0 EWP EWP EWP WE 2013-12-10 Bharati Madhyavarti Sahakari Grahak Bhandar Ltd., 629.00 0 621.39732 BAK EWP-PG50 2023-02-24 00:00:00 1 2023-02-24 BK