CHIP DESIGN FOR SUBMICRON VLSI CMOS LOYOUT AND SIMULATION (Record no. 667624)

MARC details
000 -LEADER
fixed length control field 00399pam a2200157a 44500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 230515b2018 xxu||||| |||| 00| 0 eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9788131501955
041 ## - LANGUAGE CODE
Language code of text/sound track or separate title ENGLISH
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.315/VYE
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name VYEMURA J
245 ## - TITLE STATEMENT
Title CHIP DESIGN FOR SUBMICRON VLSI CMOS LOYOUT AND SIMULATION
250 ## - EDITION STATEMENT
Edition statement 1
260 ## - PUBLICATION, DISTRIBUTION, ETC.
Place of publication, distribution, etc. NEW DELHI
Name of publisher, distributor, etc. CENGAGE
Date of publication, distribution, etc. 2018
300 ## - PHYSICAL DESCRIPTION
Extent XVI/411
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element NULL
Holdings
Withdrawn status Lost status Damaged status Not for loan Home library Current library Shelving location Date acquired Source of acquisition Cost, normal purchase price Total Checkouts Full call number Barcode Date due Date last seen Date last checked out Price effective from Koha item type
        College of Engineering, Pune College of Engineering, Pune   13/12/2018 BHARATI MADHAWARTI SAHAKARI GRAHAK BHANDAR LTD 575.00 1 621.315/VYE ECP-P-6208 18/11/2024 19/10/2024 19/10/2024 28/06/2023 Book

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